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| Categories | RF Power Components | 
|---|---|
| Brand Name: | YOUCII | 
| Model Number: | U9720A | 
| Certification: | CU,IOS | 
| Place of Origin: | China | 
| MOQ: | 1pcs | 
| Price: | negotiate a price | 
| Payment Terms: | L/C,D/A,D/P,T/T,Western Union,MoneyGram,T/T | 
| Supply Ability: | 7 pcs+per month | 
| Delivery Time: | 20 work days | 
| Packaging Details: | Carton | 
| Data rate range: | 25~29 Gbps/Gbaud | 
| Optical input range (determined by module sensitivity): | -12~3 dBm | 
| Clock recovery output frequency division ratio: | 2 / 4 / 8 / 16 / 64 / 256 | 
| CML clock differential output amplitude: | 200~800mVpp | 
| Company Info. | 
| Guangzhou UC Instruments., Co. Ltd. | 
| Verified Supplier | 
| View Contact Details | 
| Product List | 
32Gbaud PAM4 CDR Clock Recovery Module Support For NRZ And PAM4 Signals
The U9720A 32G Clock Recovery meter is a high-performance test device designed to provide clock recovery signals in test environments where there is no trigger clock. This capability enables it to perform optical eye map testing on the device under test without a crossover clock output, especially in the test of optical network devices or BOB product test scenarios in PON applications.
The clock recovery device has an SFP28/56 optical port for easy access to conventional SFP28/56, SR, LR and BIDI optical modules. Whether it is an NRZ signal or a PAM4 signal, the U9720A 32G clock recovery device can effectively handle it. Its working principle is mainly to convert the optical signal into an electrical signal, and extract the clock from the electrical signal, and then output the clock signal as the trigger signal of the oscilloscope.
Specification
| NO. | Technical index | Max | Min | Unit | 
| 1 | Data rate range | 29 | 25 | Gbps/Gbaud | 
| 2 | Wavelength range (single mode/multi-mode determined by module) | 1650 | 800 | nm | 
| 3 | Optical input range (determined by module sensitivity) | +3 | -12 | dBm | 
| 4 | Clock recovery output frequency division ratio | 2 / 4 / 8 / 16 / 64 / 256 | ||
| 5 | Output electrical clock amplitude | 500 (Typical value) | mVpp | |
| 6 | CML clock differential output amplitude | 800 | 200 | mVpp | 
| 7 | The clock output jitter randomly | 800 | 300 | fs | 
| 8 | Clock frequency (28.1Gbps as an example) | 14.05 | 0.11 | GHz | 
| 9 | Internal Signal Loss Detection (LOS) | 128 (overload) | 5 (Sensitivity) | mV | 
| 10 | Power supply voltage (external power input voltage) | 5.5 | 4 | V | 
| 11 | Operating temperature | 70 | 10 | ℃ | 
| 12 | Adaptive module type (supports NRZ and PAM4 signals) | SFP28/56,SR,LR,BIDI | ||

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